From Memristors to Nanostores and Microblades

The recent SC10 supercomputer show was quite a showcase of virtually all the current supercomputer hardware and software technology. Customers who attended the HP-CAST user group just prior to SC10 received an even deeper view into HP’s future HPC product plans. But before we start planning for ISC11 next June in Hamburg, and yes, we will have another HP-CAST meeting on June 17th and 18th before ISC, I thought I would take some time to discuss some technologies that won’t show up in products at ISC11, but are definitely being thought about in HP’s HPC engineering team as we look at the road to sustainable, repeatable exascale computing by the end of the decade.

While the concept of a memristor is not new, being initially theorized and named in 1971 by Professor Leon Chua at the University of California Berkeley, the HP Labs team led by Stan Williams has been making significant progress in recent years on demonstrating the technology, as Stan discusses in this video.

At a very basic level, memristors form the fourth fundamental circuit element alongside the resistor, capacitor, and inductor. For those of you who aren’t electrical engineers and didn’t take basic circuit theory in college, one of the first uses of memristors will most likely be in new types of non-volatile memory, bridging the gap between DRAM and SSD-Flash technology. Of course a good question is, if memristors are so powerful, why did it take from 1971 until just recently to demonstrate the technology and why are we still some number of years away from commercial memristor products? Stan hints at this in his video. The fundamental electrical properties of memristors work better the smaller the memristor is. It is at nano scale that memristors really begin to shine.

But memristors can do a lot more than store data, they can also perform logic, in the future, enabling processing to be performed exactly where the data is stored. Anyone who has ever thought of using Hadoop should immediately recognize the powerful implications of enabling computation in the very chips where data is stored. Such so-called nanostores would have untold possible uses, from Google-scale cloud data centers running MapReduce to even smarter smart phones, MP3 players, and digital cameras.

Memristors could also be incorporated into a new class of microblades for HPC applications. While a few vendors have experimented with stripped down microblades for the dedicated hosting market, such devices have generally not been powerful enough for most HPC applications. With more and more focus on data-centric HPC, future memristor powered microblades could have vast implications on the way supercomputers are built.

In case I wasn’t clear enough above, don’t expect to see HP introducing memristor based HPC systems at ISC11. The technology isn’t quite ready to challenge servers built on AMD’s next generation 16-core InterLagos CPU or take the place of the Nvidia Fermi M2070 GPUs in HP’s SL390s server, but its definitely far enough along that we are starting to think long and hard about the implications to HPC, as well as to other HP products.


About Marc Hamilton

Marc Hamilton – Vice President, Solutions Architecture and Engineering, NVIDIA. At NVIDIA, the Visual Computing Company, Marc leads the worldwide Solutions Architecture and Engineering team, responsible for working with NVIDIA’s customers and partners to deliver the world’s best end to end solutions for professional visualization and design, high performance computing, and big data analytics. Prior to NVIDIA, Marc worked in the Hyperscale Business Unit within HP’s Enterprise Group where he led the HPC team for the Americas region. Marc spent 16 years at Sun Microsystems in HPC and other sales and marketing executive management roles. Marc also worked at TRW developing HPC applications for the US aerospace and defense industry. He has published a number of technical articles and is the author of the book, “Software Development, Building Reliable Systems”. Marc holds a BS degree in Math and Computer Science from UCLA, an MS degree in Electrical Engineering from USC, and is a graduate of the UCLA Executive Management program.
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